PM_K-1 hardware: FULL-BOARD integration -- single master netlist (board.py)
circuits/board.py re-implements every block (power tree, RP2350 core, audio chain, RTC,
MIDI-DNP, interconnects, SIG/CLIP-DNP, speaker-DNP) with shared net objects and SKiDL
auto-assigned reference designators -> one coherent board.net for PCB layout.
167 components, unique refs U1-U18 / K1-K3 / J1-J5. ERC 0 errors; netlist 0 errors.
Remaining ERC warnings are all benign unconnected-pin notes on intentionally-spare pins
(relay NO contacts, 4 unused ULN2003 channels, spare GPIOs, 2 unused 74LVC14 inverters,
RTC CLKOUT, TPS65131 BSW) and OC<->GPIO notes (comparator/opto outputs read by the MCU).
MCLK-less: PCM5102A SCK tied to GND (internal PLL).
This is the complete schematic deliverable: board.net + BOM.csv ready for layout.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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