PM_K-1 hardware: Stage 4 -- balanced output driver (completes the audio chain)
THAT1646 balanced driver (pinout verified, THAT doc 600078 rev07) closes the chain: MIX_OUT -> 25-turn level-cal trim -> THAT1646 (+6dB, sense tied local) -> 47ohm build-out -> fail-safe mute relay K2 -> balanced AOUT_HOT/COLD on the interconnect; ground-lift relay K3 (de-energized=bonded, soft-lift 100R||10nF) -> CHASSIS. - Phase: Stage 3 inversion corrected via HOT<-OUT-, COLD<-OUT+. - Level cal trim ahead of the driver (its +6dB gain is fixed). - K2 fail-safe: de-energized shorts both legs to GND after the build-out (driver current-limited). K3 ground-lift in series with a face panel switch. - stage4_driver.cir: differential flat +4.76dB (1k=20k), legs antiphase (0 vs pi rad), build-out+cable rolloff above audio. ERC 0 errors; netlist 0 errors. AUDIO CHAIN COMPLETE: stages 1, 1b, 2, 3, 4 all captured + simulated + ERC-clean. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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113
hardware/eda/circuits/stage4_driver.py
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113
hardware/eda/circuits/stage4_driver.py
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#!/usr/bin/env python3
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"""PM_K-1 audio chain - Stage 4: balanced output driver (THAT1646) + mute + ground-lift.
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Run INSIDE the EDA container:
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cd hardware/eda && ./run.sh python3 ../eda/circuits/stage4_driver.py
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Outputs ERC + a KiCad netlist at hardware/kicad/stage4_driver.net. This closes the
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audio chain: MIX_OUT -> level trim -> THAT1646 -> build-out -> mute relay -> balanced
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output on the analog interconnect; plus the ground-lift relay.
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PINOUT VERIFIED (THAT doc 600078 rev 07, SO-8):
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THAT1646: 1=Out- 2=Sns- 3=Gnd 4=In 5=Vee(V-) 6=Vcc(V+) 7=Sns+ 8=Out+.
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Fixed +6 dB differential gain; sense pins tie to the output pins (local sense) with
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the 47 ohm build-out OUTSIDE the loop for cable stability. Supply 4-18V (we use +/-15).
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TQ2SA relay pinout per stage1b (coil 1/10; pole1 COM=3 NC=4 NO=2; pole2 COM=8 NC=7 NO=9).
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KEY CHOICES
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* Level cal: the THAT1646 gain is FIXED (+6 dB), so the calibration trim is a 25-turn
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pot ahead of it (DAC full-scale -> +4 dBu, accounting for summer + the +6 dB).
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* Phase: Stage 3's summer inverted the signal; corrected here by taking AOUT_HOT from
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Out- and AOUT_COLD from Out+ (absolute polarity preserved).
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* Mute (K2): fail-safe -- de-energized shorts both legs to GND (after the 47 ohm
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build-out, so the driver is current-limited). Energized = un-muted. Driven by the
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hardware rail-supervisor via K2_DRV (in the power block); MCU can also assert.
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* Ground-lift (K3): de-energized = bonded (GND<->CHASSIS); energize to LIFT. Soft-lift
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100 ohm || 10 nF across the contact keeps an RF/safety path. A face panel switch sits
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in series downstream (CHASSIS pin on the interconnect) -> both-must-close to bond.
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"""
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import os
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from skidl import *
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set_default_tool(KICAD9)
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R = Part("Device", "R", dest=TEMPLATE, footprint="Resistor_SMD:R_0805_2012Metric")
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C = Part("Device", "C", dest=TEMPLATE, footprint="Capacitor_SMD:C_0805_2012Metric")
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p15, n15, gnd, p5 = Net("+15V"), Net("-15V"), Net("GND"), Net("+5V")
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for n in (p15, n15, gnd, p5):
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n.drive = POWER
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mix_out = Net("MIX_OUT") # from Stage 3 summer (inverted)
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aout_hot, aout_cold = Net("AOUT_HOT"), Net("AOUT_COLD") # -> analog interconnect
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chassis = Net("CHASSIS") # shield -> interconnect (face panel switch + chassis)
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k2_drv, k3_drv = Net("K2_DRV"), Net("K3_DRV") # relay coil drives
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# ---- THAT1646 balanced line driver (pinout verified) ----
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DRV = Part(name="THAT1646", tool=SKIDL, dest=TEMPLATE, ref_prefix="U",
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footprint="Package_SO:SOIC-8_3.9x4.9mm_P1.27mm",
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pins=[
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Pin(num=1, name="OUT-", func=Pin.types.OUTPUT),
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Pin(num=2, name="SNS-", func=Pin.types.INPUT),
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Pin(num=3, name="GND", func=Pin.types.PWRIN),
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Pin(num=4, name="IN", func=Pin.types.INPUT),
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Pin(num=5, name="V-", func=Pin.types.PWRIN),
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Pin(num=6, name="V+", func=Pin.types.PWRIN),
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Pin(num=7, name="SNS+", func=Pin.types.INPUT),
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Pin(num=8, name="OUT+", func=Pin.types.OUTPUT),
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])
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drv = DRV(ref="U6")
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# ---- TQ2SA relay (verified pinout, reused def) ----
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def tq2sa(ref):
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p = Part(name="TQ2SA-5V", tool=SKIDL, dest=TEMPLATE, ref_prefix="K",
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footprint="Relay_SMD:Relay_DPDT_Panasonic_TQ2-SA",
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pins=[
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Pin(num=1, name="COIL_A", func=Pin.types.PASSIVE),
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Pin(num=10, name="COIL_B", func=Pin.types.PASSIVE),
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Pin(num=3, name="P1_COM", func=Pin.types.PASSIVE),
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Pin(num=4, name="P1_NC", func=Pin.types.PASSIVE),
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Pin(num=2, name="P1_NO", func=Pin.types.PASSIVE),
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Pin(num=8, name="P2_COM", func=Pin.types.PASSIVE),
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Pin(num=7, name="P2_NC", func=Pin.types.PASSIVE),
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Pin(num=9, name="P2_NO", func=Pin.types.PASSIVE),
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Pin(num=5, name="NC5", func=Pin.types.NOCONNECT),
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Pin(num=6, name="NC6", func=Pin.types.NOCONNECT),
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])
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return p(ref=ref)
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k2 = tq2sa("K2") # mute
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k3 = tq2sa("K3") # ground-lift
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# ---- level-cal trim (25-turn pot): MIX_OUT (top) / GND (bottom) / wiper -> THAT1646 IN ----
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RV = Part("Device", "R_Potentiometer", dest=TEMPLATE,
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footprint="Potentiometer_THT:Potentiometer_Bourns_3296W_Vertical")
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rv1 = RV(value="10k", ref="RV1")
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mix_out += rv1[1]; rv1[3] += gnd; rv1[2] += drv["IN"]
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# ---- THAT1646: sense ties (local) + supplies ----
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drv["SNS-"] += drv["OUT-"]
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drv["SNS+"] += drv["OUT+"]
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drv["GND"] += gnd
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drv["V+"] += p15; drv["V-"] += n15
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for rail in (p15, n15):
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c = C(value="100nF"); rail += c[1]; c[2] += gnd
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# ---- 47 ohm build-out (phase-corrected: HOT<-OUT-, COLD<-OUT+) ----
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rbo_h, rbo_c = R(value="47"), R(value="47")
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drv["OUT-"] += rbo_h[1]; rbo_h[2] += aout_hot
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drv["OUT+"] += rbo_c[1]; rbo_c[2] += aout_cold
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# ---- mute relay K2: de-energized shorts both legs to GND (fail-safe) ----
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k2["P1_COM"] += aout_hot; k2["P1_NC"] += gnd # de-energized: hot -> GND (muted)
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k2["P2_COM"] += aout_cold; k2["P2_NC"] += gnd # de-energized: cold -> GND
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k2["COIL_A"] += p5; k2["COIL_B"] += k2_drv # energize (rails OK) = un-mute
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# ---- ground-lift K3: de-energized bonds GND<->CHASSIS; energize to lift ----
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k3["P1_COM"] += gnd; k3["P1_NC"] += chassis # de-energized: bonded
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rlift = R(value="100"); clift = C(value="10nF")
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gnd += rlift[1]; rlift[2] += chassis # soft-lift: 100 ohm || 10 nF
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clift[1] += gnd; clift[2] += chassis
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k3["COIL_A"] += p5; k3["COIL_B"] += k3_drv
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ERC()
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out = os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "..", "kicad", "stage4_driver.net"))
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generate_netlist(file_=out)
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print("Stage 4 netlist ->", out)
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38
hardware/eda/sim/stage4_driver.cir
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hardware/eda/sim/stage4_driver.cir
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* PM_K-1 Stage 4 : balanced output driver -- antiphase + build-out into a cable
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*
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* The THAT1646 turns the single-ended mix into a balanced (differential) output:
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* Out+ and Out- swing equal-and-opposite, so noise picked up equally on both wires
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* cancels at the far end. It has a fixed +6 dB gain (differential = 2x input).
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* We model it as two ideal sources (Out+ = +Vin, Out- = -Vin) and add the 47 ohm
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* per-leg build-out resistors driving a 600 ohm load plus cable capacitance.
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*
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* Shows: audio band is dead flat, and the build-out + cable rolloff sits far above
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* audio -- i.e. the build-out tames long/capacitive cables without dulling the sound.
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* Run: ngspice -b ../eda/sim/stage4_driver.cir
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.title Stage4 balanced driver
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Vin in 0 AC 1
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Eop op 0 in 0 1 ; Out+ = +Vin
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Eon on 0 0 in 1 ; Out- = -Vin -> differential (op-on) = 2*Vin = +6 dB
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Rbp op hot 47 ; build-out, hot leg
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Rbn on cold 47 ; build-out, cold leg
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Rl hot cold 600 ; receiver / load
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Cch hot 0 1n ; ~cable capacitance per leg
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Ccc cold 0 1n
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.ac dec 20 10 10meg
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.control
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run
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let vddb = db(v(hot) - v(cold)) ; differential magnitude in dB
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meas ac d_1k find vddb at=1k
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meas ac d_20k find vddb at=20k
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meas ac d_1meg find vddb at=1meg
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meas ac ph_hot find vp(hot) at=1k
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meas ac ph_cold find vp(cold) at=1k
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echo
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echo " differential @1kHz : $&d_1k dB @20kHz : $&d_20k dB (flat across audio)"
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echo " hot phase: $&ph_hot rad ; cold phase: $&ph_cold rad (~pi rad = 180 deg apart = balanced/antiphase)"
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echo " differential @1MHz : $&d_1meg dB (build-out+cable rolloff stays above audio)"
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.endc
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.end
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12
hardware/kicad/stage4_driver.erc
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hardware/kicad/stage4_driver.erc
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ERC WARNING: Only one pin (PASSIVE pin 10/COIL_B of TQ2SA-5V/K2) attached to net K2_DRV.
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ERC WARNING: Only one pin (PASSIVE pin 1/1 of R_Potentiometer/RV1) attached to net MIX_OUT.
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ERC WARNING: Only one pin (PASSIVE pin 10/COIL_B of TQ2SA-5V/K3) attached to net K3_DRV.
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ERC WARNING: Unconnected pin: PASSIVE pin 2/P1_NO of TQ2SA-5V/K2.
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ERC WARNING: Unconnected pin: PASSIVE pin 9/P2_NO of TQ2SA-5V/K2.
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ERC WARNING: Unconnected pin: PASSIVE pin 2/P1_NO of TQ2SA-5V/K3.
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ERC WARNING: Unconnected pin: PASSIVE pin 8/P2_COM of TQ2SA-5V/K3.
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ERC WARNING: Unconnected pin: PASSIVE pin 7/P2_NC of TQ2SA-5V/K3.
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ERC WARNING: Unconnected pin: PASSIVE pin 9/P2_NO of TQ2SA-5V/K3.
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ERC INFO: 9 warnings found while running ERC.
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ERC INFO: 0 errors found while running ERC.
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31
hardware/kicad/stage4_driver.log
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31
hardware/kicad/stage4_driver.log
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WARNING: KICAD8_SYMBOL_DIR environment variable is missing, so the default KiCad symbol libraries won't be searched. @ [/work/hardware/kicad/<frozen importlib._bootstrap_external>:995=>/work/hardware/kicad/<frozen importlib._bootstrap>:488]
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WARNING: KICAD6_SYMBOL_DIR environment variable is missing, so the default KiCad symbol libraries won't be searched. @ [/work/hardware/kicad/<frozen importlib._bootstrap_external>:995=>/work/hardware/kicad/<frozen importlib._bootstrap>:488]
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WARNING: KICAD7_SYMBOL_DIR environment variable is missing, so the default KiCad symbol libraries won't be searched. @ [/work/hardware/kicad/<frozen importlib._bootstrap_external>:995=>/work/hardware/kicad/<frozen importlib._bootstrap>:488]
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WARNING: fp-lib-table file was not found. Component footprints are not available.
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WARNING: fp-lib-table file was not found. Component footprints are not available.
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WARNING: fp-lib-table file was not found. Component footprints are not available.
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WARNING: fp-lib-table file was not found. Component footprints are not available.
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WARNING: Missing tag on THAT1646 instantiated at /work/hardware/eda/circuits/stage4_driver.py:57.
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WARNING: Random tag jOycpJtysP generated for THAT1646.
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WARNING: Missing tag on TQ2SA-5V instantiated at /work/hardware/eda/circuits/stage4_driver.py:75.
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WARNING: Random tag 8YvHjEQvvL generated for TQ2SA-5V.
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WARNING: Missing tag on TQ2SA-5V instantiated at /work/hardware/eda/circuits/stage4_driver.py:75.
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WARNING: Random tag gbZbaJRgHN generated for TQ2SA-5V.
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WARNING: Missing tag on R_Potentiometer instantiated at /work/hardware/eda/circuits/stage4_driver.py:82.
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WARNING: Random tag TtWL0siwIj generated for R_Potentiometer.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage4_driver.py:91.
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WARNING: Random tag Il2xsDxaas generated for C.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage4_driver.py:91.
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WARNING: Random tag h4JnvQCBxp generated for C.
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WARNING: Missing tag on R instantiated at /work/hardware/eda/circuits/stage4_driver.py:94.
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WARNING: Random tag 49MKQ_ERoo generated for R.
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WARNING: Missing tag on R instantiated at /work/hardware/eda/circuits/stage4_driver.py:94.
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WARNING: Random tag L4esGcufU5 generated for R.
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WARNING: Missing tag on R instantiated at /work/hardware/eda/circuits/stage4_driver.py:105.
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WARNING: Random tag xtw8oitG50 generated for R.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage4_driver.py:105.
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WARNING: Random tag 5KGv1Z40Bi generated for C.
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WARNING: Missing tag on instantiated at /work/hardware/kicad/<frozen importlib._bootstrap>:488.
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INFO: 25 warnings found while generating netlist.
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INFO: 0 errors found while generating netlist.
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38
hardware/kicad/stage4_driver_sklib.py
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hardware/kicad/stage4_driver_sklib.py
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from collections import defaultdict
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from skidl import Pin, Part, Alias, SchLib, SKIDL, TEMPLATE
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from skidl.pin import pin_types
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SKIDL_lib_version = '0.0.1'
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stage4_driver = SchLib(tool=SKIDL).add_parts(*[
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Part(**{ 'name':'THAT1646', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'THAT1646'}), 'ref_prefix':'U', 'fplist':None, 'footprint':'Package_SO:SOIC-8_3.9x4.9mm_P1.27mm', 'keywords':None, 'description':'', 'datasheet':None, 'pins':[
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Pin(num='1',name='OUT-',func=pin_types.OUTPUT),
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Pin(num='2',name='SNS-',func=pin_types.INPUT),
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Pin(num='3',name='GND',func=pin_types.PWRIN),
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Pin(num='4',name='IN',func=pin_types.INPUT),
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Pin(num='5',name='V-',func=pin_types.PWRIN),
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Pin(num='6',name='V+',func=pin_types.PWRIN),
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Pin(num='7',name='SNS+',func=pin_types.INPUT),
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Pin(num='8',name='OUT+',func=pin_types.OUTPUT)] }),
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Part(**{ 'name':'TQ2SA-5V', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'TQ2SA-5V'}), 'ref_prefix':'K', 'fplist':None, 'footprint':'Relay_SMD:Relay_DPDT_Panasonic_TQ2-SA', 'keywords':None, 'description':'', 'datasheet':None, 'pins':[
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Pin(num='1',name='COIL_A',func=pin_types.PASSIVE),
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Pin(num='10',name='COIL_B',func=pin_types.PASSIVE),
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Pin(num='3',name='P1_COM',func=pin_types.PASSIVE),
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Pin(num='4',name='P1_NC',func=pin_types.PASSIVE),
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Pin(num='2',name='P1_NO',func=pin_types.PASSIVE),
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Pin(num='8',name='P2_COM',func=pin_types.PASSIVE),
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Pin(num='7',name='P2_NC',func=pin_types.PASSIVE),
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Pin(num='9',name='P2_NO',func=pin_types.PASSIVE),
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Pin(num='5',name='NC5',func=pin_types.NOCONNECT),
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Pin(num='6',name='NC6',func=pin_types.NOCONNECT)] }),
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Part(**{ 'name':'R_Potentiometer', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'R_Potentiometer'}), 'ref_prefix':'RV', 'fplist':[''], 'footprint':'Potentiometer_THT:Potentiometer_Bourns_3296W_Vertical', 'keywords':'resistor variable', 'description':'Potentiometer', 'datasheet':'~', 'pins':[
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Pin(num='1',name='1',func=pin_types.PASSIVE,unit=1),
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Pin(num='3',name='3',func=pin_types.PASSIVE,unit=1),
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Pin(num='2',name='2',func=pin_types.PASSIVE,unit=1)], 'unit_defs':[] }),
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Part(**{ 'name':'C', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'C'}), 'ref_prefix':'C', 'fplist':[''], 'footprint':'Capacitor_SMD:C_0805_2012Metric', 'keywords':'cap capacitor', 'description':'Unpolarized capacitor', 'datasheet':'~', 'pins':[
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Pin(num='1',name='~',func=pin_types.PASSIVE,unit=1),
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Pin(num='2',name='~',func=pin_types.PASSIVE,unit=1)], 'unit_defs':[] }),
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Part(**{ 'name':'R', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'R'}), 'ref_prefix':'R', 'fplist':[''], 'footprint':'Resistor_SMD:R_0805_2012Metric', 'keywords':'R res resistor', 'description':'Resistor', 'datasheet':'~', 'pins':[
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Pin(num='1',name='~',func=pin_types.PASSIVE,unit=1),
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Pin(num='2',name='~',func=pin_types.PASSIVE,unit=1)], 'unit_defs':[] })])
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