circuits/power_tree.py captures the full supply, topology + values verified from the
TPS65131 datasheet (SLVS493E: pinout p3, Typical Application Fig 8-1 p11, BOM Table 8-2
p12, FB equations p13 Vref=1.213V) and the TPS7A49/TPS7A30 LDO datasheets:
- TPS65131 dual boost/inverter: L1/L2=4.7uH, D1/D2=MBRM120, FB dividers set ~+/-18.2V
(R1=1.4M/R2=100k, R3=1.5M/R4=100k), comp C7/C6 on CP/CN, VREF 220nF, no Q1 (USB),
PSP/PSN=GND forced-PWM for low audio-band noise.
- TPS7A4901/TPS7A3001 post-regulate to clean +/-15V (shared 8-pin pinout, EN tied to IN).
- AP2112K-3.3 -> digital 3V3.
ERC 0 errors; netlist 0 errors.
CONFIRM before fab: exact LDO Vfb (used ~1.194V/-1.18V for the dividers) and the
AP2112K SOT-23-5 pinout. Switcher validated vs TI reference design; no SPICE (behavioral
models don't validate a switcher) -- layout per the TI EVM.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
cd619cfeb2