metronome/hardware/DESIGN.md

PM_K-1 Core Board ("brain") — design-of-record

VARASYS PolyMeter · heirloom pro-audio · modular brain/face architecture Status: design-of-record / pre-layout. Component selection complete; PCB routing is the remaining interactive step (see Open items).

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1. Philosophy

This is meant to be a device people hand down to their great-grandkids. The core board carries all the active electronics and is specced to pro/audiophile tier with longevity and serviceability as first-class goals. We do not value-engineer the audio path.

The user selects the face/enclosure/connector components; this document specs only the core.

2. Architecture — modular brain/face

• Core ("brain"): RP2350 + power + RTC + the full pro-audio analog chain + control logic. One core design is reused across every form factor.
• Face ("form factor"): display, touch, joystick, buttons, LED, speaker, the physical audio/MIDI connectors, panel switches, enclosure. The core never decides connector type.
• Two interconnects, deliberately separate (§7):
  1. a digital ribbon whose pinout mirrors the Raspberry Pi Pico, so a stock Pico/Pico 2 on a test adapter can drive any face board for bring-up;
  2. an analog interconnect (+ a small MIDI interconnect) kept physically away from the fast digital ribbon, because a balanced audio signal must never run parallel to the 24 MHz display SPI.

3. Block diagram

USB-C 5V ─┬─► 3V3 LDO ──────────────────────► RP2350 (core reg + ext L) + W25Q128 16MB + RV-8803 RTC(+CR2032)
          │                                            │ I²S + low-jitter MCLK
          └─► TPS65131 ±18V ─► TPS7A49/30 LDO ─► clean ±15V          ▼
                                                          PCM5102A DAC ──► [summing: click + input]
                                                                                    │
  bal IN ─[ESD/DC-block/clamp/series-R]─► [LINE/INST relay] ─┬─ THAT1240 receiver ──┘
  (analog interconnect)                                      └─ OPA1641 Hi-Z DI buffer (+gain)
                                                                                    │
                                              THAT1646 balanced driver ─[47Ω build-out]─► [MUTE relay]─► bal OUT
                                                                                    shield ─[panel SW]─[GND-LIFT relay]─ gnd
  sig/clip peak detect ─► LM393 ─► RP2350 GPIO (UI) + LED lines (interconnect)
  RP2350 UART ─► [DNP: H11L1 opto IN + 74LVC14 buffer OUT] ─► MIDI interconnect   (USB-MIDI = default)

4. Functional blocks

4.1 MCU + digital

• RP2350A (QFN-60, 30 GPIO). Chosen over RP2040 as the newest in-house part: dual M33+RISC-V, 520 KB RAM, secure boot, longest production runway. Firmware runs unchanged.
  • Erratum E9: high-impedance inputs can latch — every input we read (face switches, buttons) gets an external pulldown, never relies on the internal pad alone.
  • Core supply via the RP2350 on-chip switched-mode regulator (external inductor); 3V3 IO from an external LDO (AP2112K-3.3 / TLV75533).
• Flash: Winbond W25Q128JV (16 MB) — genuine part; the CircuitPython appliance bundles the editor + tracks on a USB drive. Firmware does wear-leveling for history.json.
• Crystal: 12 MHz ±30 ppm.
• Debug/service: SWD 2×5 Cortex-Debug header + labeled test points (rails, I²S, audio nodes).

4.2 Click source (DAC)

• TI/Burr-Brown PCM5102A I²S DAC — reliability-first, widely stocked for future repair.
• Fed by a dedicated low-jitter audio oscillator (22.5792/24.576 MHz MEMS XO), not an MCLK jittered out of the RP2350 PIO — jitter is audible as a raised noise floor.

4.3 Analog audio chain (the heart)

• Input (balanced, switchable line/instrument):
  • Line mode: THAT1240 laser-trimmed balanced receiver (~high CMRR, no hand-matched resistors).
  • Instrument mode: OPA1641 JFET Hi-Z buffer (≥1 MΩ) + ~+10–15 dB gain (active DI).
  • Selected by a gold-contact signal relay on the core (1 GPIO; touchscreen toggle, optional face panel switch on a separate GPIO input).
  • Protection (non-negotiable): series DC-blocking film cap (blocks +48 V phantom — the real input-killer), clamp diodes/TVS to the rails, series current-limit resistor. A wrong-mode plug then only sounds wrong; nothing is damaged.
• Mix: digital/firmware (touchscreen). Analog stage at unity; click level set via the DAC.
• Output driver: THAT1646 balanced line driver, 47 Ω build-out per leg for cable-capacitance stability and short-circuit tolerance (§5.1).
• No electrolytics in the signal path — film coupling caps (WIMA). 0.1 % thin-film resistors.

4.4 Output protection / conditioning

• Power-up/down mute relay — fail-safe, de-energized = muted (shorts hot+cold to gnd). A hardware rail supervisor + RC turn-on delay un-mutes only after ±15 V settles; on power loss the coil drops and mutes faster than the rails can thump. Not MCU-dependent. The MCU can also assert mute (for clean line/inst flips and DAC reconfig).
• Ground-lift — both a face panel switch and a core GPIO relay, wired in series in the shield-ground path: bonded only when both closed, either opening lifts it. Soft lift = 100 Ω ∥ 10 nF (not a hard open) so RF/safety keeps a path.

4.5 RTC

• Micro Crystal RV-8803 (integrated 32.768 kHz crystal → no second crystal near the RP2350's own) + CR2032 in a socketed holder. Shares the touch I²C bus (no extra GPIO). Drift is irrelevant for a practice-log timestamp; reliability and zero-fuss layout win.

4.6 MIDI (default USB, hardware optional)

• USB-MIDI is the default and already in firmware — IN/OUT/THRU are software routing to a computer/tablet host. Zero extra parts.
• Dedicated DIN/TRS MIDI is a DNP populate-option: the RP2350 UART lines route to the MIDI interconnect with H11L1 opto IN + 74LVC14 buffered OUT/THRU footprints left unpopulated. A "stage" face can populate them for laptop-free hardware sync. (USB-MIDI can't peer-to-peer with standalone DIN gear — the device is a USB peripheral, not a host — which is why the hardware option stays available.) Analog pulse/clock sync: not included (MIDI only).

4.7 Monitor speaker

• DNP-optional class-D amp (PAM8302) footprint on the core; speaker +/- routed on the analog interconnect. Populated only for form factors that want a built-in monitor.

5. The five remaining pro details (decided)

5.1 Output impedance & level calibration

• THAT1646 source impedance is near-zero; 47 Ω build-out resistors per leg give stable driving into long/capacitive cables and survive a shorted output.
• Level calibration: a 25-turn precision trimmer (Bourns 3296W) in the driver gain network, factory-set so DAC full-scale → +4 dBu nominal, leaving ~+24 dBu peak headroom on ±15 V. Set-and-forget on the core; not a face control.

5.2 Signal / clip indication

• A peak detector (Schottky + hold cap) on the input (signal-present, ~−40 dBu) and on the driver-input/summing node (clip, within ~3 dB of rail) feeds an LM393 dual comparator.
• Comparator outputs go to RP2350 GPIOs (clip/signal shown on the touchscreen) and are mirrored to SIG/CLIP LED drive lines on the digital interconnect so a face can fit discrete LEDs.

5.3 ESD / EMI hardening

• USB-C: USBLC6-2SC6 (or TPD4E05U06) ESD array on D±/CC/VBUS; common-mode choke on the data pair; shell bonded to chassis via RC; ferrite + TVS + bulk on VBUS.
• Interconnects: ~33 Ω series on fast SPI lines for edge-rate control; ESD clamp arrays on any line reaching a user-touchable cable; interleaved ground pins; ferrite beads where 3V3/5V cross into the analog domain.
• Board: full ground planes + stitching vias; the boost/inverter switcher lives in a guarded corner away from the analog section; analog/digital grounds meet at a single star point.
• Heirloom option: conformal coating for humidity/longevity (build-time choice).

5.4 Chassis / strain-relief (core-side)

• 4× M3 mounting holes with keep-outs; a dedicated chassis-ground pad/pin.
• Through-hole-anchored USB-C jack (SMD-only tabs shear off with cable wiggle — unacceptable for a 50-year device).
• Shrouded, keyed, latching interconnect headers (can't insert backward or vibrate loose).
• Panel strain-relief and connector mounting live on the face/enclosure.

5.5 Interconnect pinout — see §7.

6. Power tree

Rail	Source	Part	Notes
+5 V	USB-C VBUS	—	ferrite + TVS + bulk
+3V3 (IO)	LDO from 5 V	AP2112K-3.3 / TLV75533	digital domain
+1.1 V core	RP2350 internal SMPS	(external inductor)	per RP2350 ref
±18 V (raw)	dual boost/inverter from 5 V	TPS65131	switcher, guarded corner
±15 V (clean)	ultra-low-noise LDO	TPS7A4901 (+) / TPS7A3001 (−)	feeds all audio op-amps

7. Interconnect pinouts

7.1 Digital ribbon — 2×13 (26-pin) IDC, Pico-pinout-compatible

Grounds interleaved around SPI. A Pico/Pico 2 test adapter maps these to the listed GP.

Pin	Signal	GP		Pin	Signal	GP
1	+5V	—		2	GND	—
3	+3V3	—		4	GND	—
5	SPI_SCK	GP2		6	GND	—
7	SPI_MOSI	GP3		8	LCD_CS	GP5
9	LCD_DC	GP6		10	LCD_RST	GP7
11	GND	—		12	I2C_SDA	GP8
13	I2C_SCL	GP9		14	GND	—
15	JOY_X (ADC0)	GP26		16	JOY_Y (ADC1)	GP27
17	BTN_A	GP15		18	BTN_B	GP14
19	WS2812	GP12		20	GND	—
21	GNDLIFT_SW (in)	GP21		22	LINEINST_SW (in)	GP22
23	SIG_LED	GP19		24	CLIP_LED	GP20
25	GND	—		26	GND	—

I²S (BCK/LRCK/DOUT), the relays (line/inst route GP16, mute GP18, gnd-lift GP17), and MCLK stay on-core — they are not on the ribbon. A Pico test brain drives the digital/face I/O above but cannot drive the analog chain (DAC/op-amps are core-only).

Display TE line — route it on the production face. The table above mirrors the EP-0172 prototype, which wires only SCK/MOSI/CS/DC/RST and no TE (tearing-effect) output. Per the ST7796S datasheet §10.8, the panel rescans its frame memory to the glass at 60 Hz and the only sanctioned way to avoid tearing is to feed the TE output back to the MCU and write during vblank (tvdh). Without it, large updates tear and only small sub-region writes hide it (this is why MicroPython/CircuitPython, which draw glyph-by-glyph, look clean and the Rust full-frame blits don't). Add the LCD TE pin to a spare GPIO (e.g. GP4) on the face interconnect — and optionally LCD MISO/SDO for GSCAN(45h)/status reads. Then firmware can do TEON(35h)+vblank-synced writes and be fully tear-free even on full repaints.

7.2 Analog audio interconnect — 2×5 (10-pin), twisted/shielded, away from digital

Pin	Signal		Pin	Signal
1	AOUT_HOT		2	AGND
3	AOUT_COLD		4	CHASSIS/SHIELD (face side of ground-lift)
5	AIN_HOT		6	AGND
7	AIN_COLD		8	SPK+ (DNP)
9	AGND		10	SPK− (DNP)

7.3 MIDI interconnect — 1×6, only if DNP MIDI populated

Pin	Signal
1	MIDI_OUT_A (TRS-A tip/ring leg)
2	MIDI_OUT_B
3	MIDI_IN_A (to opto)
4	MIDI_IN_B
5	+5V (OUT drive)
6	GND / shield

8. BOM

Full part list with manufacturer numbers and rough costs in hardware/BOM.csv. Headline parts: RP2350A · W25Q128JV · PCM5102A · THAT1240 + THAT1646 · OPA1641 · OPA1612 · TPS65131 + TPS7A4901/3001 · RV-8803 · USBLC6-2SC6 · 3× Panasonic TQ2SA gold-contact relays · H11L1 (DNP).

9. Manufacturing

• PCB: ENIG (gold) finish — non-negotiable for decades of reliable contacts/solderability.
• Assembly: JLCPCB/PCBWay PCBA, ~5-board prototype minimum; ~$80–200 first run. Core parts cost ~$25–40/board one-off (pro op-amps + relays dominate), trending toward ~$15–20 at qty 100.
• Most expensive items are the THAT audio ICs and the relays — that's where "heirloom" lives.

10. Open items

• PCB layout/routing is the interactive next step — placement, controlled-impedance USB pair, star ground, switcher isolation, copper pours, DRC. The KiCad project under hardware/kicad/ is a documented schematic canvas + design-of-record; symbol placement and wiring happen in Eeschema. kicad-cli is used here for ERC and PDF export verification.
• Confirm the exact 3.5" ST7796/GT911 panel connector (FPC vs header) before finalizing the face.
• Decide MIDI connector (TRS-MIDI Type-A vs DIN-5) per form factor — face decision.