7eea02f1d2
circuits/interconnect.py maps the board nets onto connectors per DESIGN.md s7: - J3 digital ribbon 2x13 (Pico-pinout): display SPI, touch I2C, joystick ADC, buttons, WS2812, panel-switch inputs, SIG/CLIP LED lines, power. - J4 analog 2x5: balanced out hot/cold, shield, balanced in hot/cold, speaker (kept off the fast digital ribbon). - J5 MIDI 1x8: OUT/IN/THRU loops + power (DNP MIDI only). - J1 USB-C receptacle (KiCad lib symbol) + USBLC6-2SC6 ESD + 5.1k CC pulldowns; D+/D- from the core's 27R series, VBUS to the power tree. ERC 0 errors; netlist 0 errors. Confirm USB-C connector variant (24-pin sym vs 16-pin GCT USB4085) + USBLC6 footprint at layout. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
82 lines
4.5 KiB
Python
82 lines
4.5 KiB
Python
#!/usr/bin/env python3
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"""PM_K-1 interconnects (SKiDL): digital ribbon + analog header + MIDI header + USB-C sub-block.
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Run INSIDE the EDA container:
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cd hardware/eda && ./run.sh python3 ../eda/circuits/interconnect.py
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Outputs ERC + hardware/kicad/interconnect.net.
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Maps the named board nets onto the physical connectors (pinouts per DESIGN.md s7):
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J3 digital ribbon (2x13, Pico-pinout) -- display SPI, touch I2C, joystick ADC, buttons,
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LED, panel-switch inputs, SIG/CLIP LED lines, power.
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J4 analog header (2x5) -- balanced out hot/cold, shield, balanced in hot/cold, speaker.
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J5 MIDI header (1x8) -- OUT/IN/THRU loops + 5V + GND (used only if DNP MIDI fitted).
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J1 USB-C receptacle + USBLC6-2SC6 ESD + CC pulldowns. D+/D- come from the core's 27R
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series (USB_DP_CONN/USB_DM_CONN); VBUS feeds the power tree.
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USB_C_Receptacle = authoritative KiCad symbol (24-pin; SS pins unused for USB2.0). If a
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16-pin USB2.0 connector (GCT USB4085, in BOM) is used, swap symbol+footprint at layout.
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USBLC6-2SC6 hand-defined to the standard ST SOT-23-6 pinout (I/O1=1,6 / GND=2 / I/O2=3,4 /
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VBUS=5) -- confirm at layout.
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"""
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import os
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from skidl import *
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set_default_tool(KICAD9)
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P = Pin.types
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R = Part("Device","R", dest=TEMPLATE, footprint="Resistor_SMD:R_0402_1005Metric")
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# ---- rails + every signal that crosses to a face ----
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p5, p3v3, gnd = Net("+5V"), Net("+3V3"), Net("GND")
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for n in (p5, p3v3): n.drive = POWER
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gnd.drive = POWER
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N = lambda s: Net(s)
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spi_sck,spi_mosi,lcd_cs,lcd_dc,lcd_rst = N("SPI_SCK"),N("SPI_MOSI"),N("LCD_CS"),N("LCD_DC"),N("LCD_RST")
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i2c_sda,i2c_scl,joy_x,joy_y,btn_a,btn_b,ws2812 = N("I2C_SDA"),N("I2C_SCL"),N("JOY_X"),N("JOY_Y"),N("BTN_A"),N("BTN_B"),N("WS2812")
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gndlift_sw,lineinst_sw,sig_led,clip_led = N("GNDLIFT_SW"),N("LINEINST_SW"),N("SIG_LED"),N("CLIP_LED")
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aout_hot,aout_cold,chassis,ain_hot,ain_cold,spkp,spkn = (N("AOUT_HOT"),N("AOUT_COLD"),N("CHASSIS"),
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N("AIN_HOT"),N("AIN_COLD"),N("SPK_P"),N("SPK_N"))
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mo_a,mo_b,mi_a,mi_b,mt_a,mt_b = N("MIDI_OUT_A"),N("MIDI_OUT_B"),N("MIDI_IN_A"),N("MIDI_IN_B"),N("MIDI_THRU_A"),N("MIDI_THRU_B")
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vbus,usb_dp_c,usb_dm_c = N("VBUS_5V"),N("USB_DP_CONN"),N("USB_DM_CONN")
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vbus.drive = POWER
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def hdr(name, fp, ref): return Part("Connector_Generic", name, footprint=fp, ref=ref)
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# ---- J3 digital ribbon (2x13, Pico-pinout) -- DESIGN.md s7.1 ----
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j3 = hdr("Conn_02x13_Odd_Even","Connector_PinHeader_2.54mm:PinHeader_2x13_P2.54mm_Vertical","J3")
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dmap = {1:p5,2:gnd,3:p3v3,4:gnd,5:spi_sck,6:gnd,7:spi_mosi,8:lcd_cs,9:lcd_dc,10:lcd_rst,
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11:gnd,12:i2c_sda,13:i2c_scl,14:gnd,15:joy_x,16:joy_y,17:btn_a,18:btn_b,19:ws2812,20:gnd,
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21:gndlift_sw,22:lineinst_sw,23:sig_led,24:clip_led,25:gnd,26:gnd}
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for pin,net in dmap.items(): j3[pin] += net
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# ---- J4 analog header (2x5) -- DESIGN.md s7.2 (kept away from the digital ribbon) ----
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j4 = hdr("Conn_02x05_Odd_Even","Connector_PinHeader_2.54mm:PinHeader_2x05_P2.54mm_Vertical","J4")
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amap = {1:aout_hot,2:gnd,3:aout_cold,4:chassis,5:ain_hot,6:gnd,7:ain_cold,8:spkp,9:gnd,10:spkn}
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for pin,net in amap.items(): j4[pin] += net
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# ---- J5 MIDI header (1x8) -- OUT/IN/THRU + power (DNP MIDI only) ----
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j5 = hdr("Conn_01x08","Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical","J5")
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mmap = {1:mo_a,2:mo_b,3:mi_a,4:mi_b,5:mt_a,6:mt_b,7:p5,8:gnd}
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for pin,net in mmap.items(): j5[pin] += net
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# ---- J1 USB-C receptacle (USB2.0 subset of the 24-pin symbol) ----
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j1 = Part("Connector","USB_C_Receptacle",
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footprint="Connector_USB:USB_C_Receptacle_HRO_TYPE-C-31-M-12", ref="J1")
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j1["VBUS"] += vbus; j1["GND"] += gnd; j1["SHIELD"] += chassis
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j1["D+"] += usb_dp_c; j1["D-"] += usb_dm_c # name returns both A/B-side pins
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rcc1 = R(value="5.1k"); rcc2 = R(value="5.1k") # UFP/device CC pulldowns
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j1["CC1"] += rcc1[1]; rcc1[2] += gnd
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j1["CC2"] += rcc2[1]; rcc2[2] += gnd
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# ---- USBLC6-2SC6 ESD (standard ST SOT-23-6 pinout) ----
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ESD = Part(name="USBLC6-2SC6", tool=SKIDL, dest=TEMPLATE, ref_prefix="U",
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footprint="Package_TO_SOT_SMD:SOT-23-6",
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pins=[Pin(num=1,name="IO1",func=P.PASSIVE),Pin(num=2,name="GND",func=P.PWRIN),Pin(num=3,name="IO2",func=P.PASSIVE),
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Pin(num=4,name="IO2b",func=P.PASSIVE),Pin(num=5,name="VBUS",func=P.PASSIVE),Pin(num=6,name="IO1b",func=P.PASSIVE)])
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esd = ESD(ref="U10")
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esd[1] += usb_dp_c; esd[6] += usb_dp_c # I/O1 (D+) clamp
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esd[3] += usb_dm_c; esd[4] += usb_dm_c # I/O2 (D-) clamp
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esd[2] += gnd; esd[5] += vbus
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ERC()
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out = os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "..", "kicad", "interconnect.net"))
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generate_netlist(file_=out)
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print("Interconnect netlist ->", out)
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