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Me Here 8cbd53a2ee PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 
- hardware/kicad/fp-lib-table: project footprint-library table registering pm_k1 ->
  ${KIPRJMOD}/pm_k1.pretty, so opening the pm_k1_core project auto-resolves the custom
  TQ2SA relay + RV-8803-C7 footprints (fixes the 4 "footprint not found" import errors
  for K1/K2/K3/U13).
- schematics/*.svg: inserted a white background rect (netlistsvg renders dark strokes on
  a transparent bg -> invisible in dark-mode viewers).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-05-31 17:57:10 -05:00
..
.gitignore PM_K-1 hardware: per-block schematic SVGs (netlistsvg) so the design is viewable 2026-05-31 16:42:04 -05:00
audio_chain.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
indicator.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
mcu_core.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
midi.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
power_tree.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
README.md PM_K-1 hardware: per-block schematic SVGs (netlistsvg) so the design is viewable 2026-05-31 16:42:04 -05:00
rtc.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
speaker.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
stage1_input.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
stage1b_select.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
stage2_dac.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
stage3_sum.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00
stage4_driver.svg PM_K-1 hardware: register pm_k1 fp-lib (fix import errors) + white bg on SVGs 2026-05-31 17:57:10 -05:00

README.md

Schematic views (auto-generated)

Per-block schematic images of the PM_K-1 core board, rendered from the SKiDL circuits with netlistsvg. Open any .svg in a web browser.

What these are: functional, auto-routed schematics (boxes + wires) for tracing connections — not hand-arranged, pretty EE drawings. Each file is one block, so it's readable; the full 167-part board would be an unreadable hairball.

File Block
stage1_input.svg balanced line receiver + protection
stage1b_select.svg Hi-Z instrument DI buffer + select relay
stage2_dac.svg PCM5102A DAC + reconstruction filter
stage3_sum.svg summing node
stage4_driver.svg balanced output driver + mute + ground-lift
audio_chain.svg the five audio stages integrated (busier)
power_tree.svg ±18 V switcher → ±15 V LDOs + 3V3
mcu_core.svg RP2350 + flash + crystal + USB + boot/SWD
rtc.svg RV-8803 RTC + coin-cell backup
midi.svg DNP opto IN + buffered OUT/THRU
indicator.svg SIG/CLIP detector
speaker.svg monitor speaker amp

interconnect is intentionally absent — netlistsvg's layout engine errors on the 24-pin USB-C + many headers. Its connections are pure pin-to-net mapping, fully tabulated in hardware/DESIGN.md §7 and circuits/interconnect.py.

Regenerate (inside the container): for each block, ./run.sh python3 ../eda/make_svg.py circuits/<block>.py schematics/<block> then netlistsvg schematics/<block>.json -o schematics/<block>.svg --skin schematics/<block>_skin.svg.

For the authoritative, hand-written design intent see the circuits/*.py files and hardware/DESIGN.md block diagrams; for the connection list see hardware/kicad/board.net.