d80c35984e
Develop the full Daisy Pod spike so it can be flashed the moment the board arrives. Architecture: one shared engine, two front-ends. - pm-synth: make it `#![no_std]` (mirroring track-format), routing float math through `libm` so the SAME f32 code runs on the host and on the Daisy's Cortex-M7F (hardware FPU — no fixed-point port needed). Add `Player`, a self-running sequencer that owns the Synth + scheduled clicks and renders sample-by-sample, looping at the pattern boundary. Integer-only hot path (clicks pre-resolved to sample indices); exposes a `fired()` beat counter. Add SPIKE_PROGRAM/SPIKE_BARS as the shared source of truth. - synthrender: render the SAME Player to pm-daisy-preview.wav — the host-side "simulator". Bit-identical preview of the hardware output (before its codec); far more useful than chip emulation (Renode can't model the audio codec). - pm-daisy (new, workspace-excluded firmware): thin BSP binary for the Daisy Seed/Pod. embedded-alloc heap + board bring-up + SAI-DMA audio interrupt feeding Player::next_sample() into stereo frames, USER LED flashing per click. Audio loop follows the `daisy` crate's examples/audio.rs. Board revision (codec) is a Cargo feature; README documents matching it + both flash paths (probe-rs/RTT and USB DFU) + the QSPI-bootloader fallback. Verified without hardware: host build + preview render (48 kHz, onsets on the 8th-note grid at 124 BPM); firmware cross-compiles + links for thumbv7em-none- eabihf at ~87 KB (fits the 128 KB internal flash) across all three codec revisions; track-format conformance + `node tests/run.mjs` (47 pass) still green. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
60 lines
1.8 KiB
Text
60 lines
1.8 KiB
Text
/* STM32H750IB memory map (Daisy Seed), from the `daisy` crate / libDaisy STM32H750IB_flash.lds.
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*
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* NOTE: the STM32H750 has only 128 KB of internal flash. If the firmware overflows it (the linker
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* will say so), flash via the Daisy Bootloader to the 8 MB QSPI instead — see README.md ("Too big
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* for 128 KB?"). For that path, change FLASH to:
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* FLASH (RX) : ORIGIN = 0x90040000, LENGTH = 8M - 0x40000
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* and flash the .bin with dfu-util to 0x90040000 (the bootloader copies it to SDRAM and runs it).
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*/
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MEMORY
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{
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FLASH (RX) : ORIGIN = 0x08000000, LENGTH = 128K
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DTCMRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 128K
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SRAM (RWX) : ORIGIN = 0x24000000, LENGTH = 512K
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RAM_D2 (RWX) : ORIGIN = 0x30000000, LENGTH = 288K
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RAM_D3 (RWX) : ORIGIN = 0x38000000, LENGTH = 64K
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ITCMRAM (RWX) : ORIGIN = 0x00000000, LENGTH = 64K
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SDRAM (RWX) : ORIGIN = 0xc0000000, LENGTH = 64M
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QSPIFLASH (RX) : ORIGIN = 0x90000000, LENGTH = 8M
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}
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REGION_ALIAS(RAM, DTCMRAM);
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SECTIONS
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{
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.sram1_bss (NOLOAD) :
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{
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. = ALIGN(4);
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_ssram1_bss = .;
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PROVIDE(__sram1_bss_start__ = _sram1_bss);
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*(.sram1_bss)
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*(.sram1_bss*)
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. = ALIGN(4);
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_esram1_bss = .;
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PROVIDE(__sram1_bss_end__ = _esram1_bss);
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} > RAM_D2
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.sdram_bss (NOLOAD) :
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{
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. = ALIGN(4);
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_ssdram_bss = .;
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PROVIDE(__sdram_bss_start = _ssdram_bss);
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*(.sdram_bss)
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*(.sdram_bss*)
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. = ALIGN(4);
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_esdram_bss = .;
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PROVIDE(__sdram_bss_end = _esdram_bss);
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} > SDRAM
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.sram (NOLOAD) :
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{
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. = ALIGN(4);
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_ssram = .;
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PROVIDE(__sram_start__ = _sram);
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*(.sram)
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*(.sram*)
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. = ALIGN(4);
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_esram = .;
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PROVIDE(__sram_end__ = _esram);
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} > SRAM
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}
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