metronome/hardware/kicad
Me Here 2f44be6f63 PM_K-1 hardware: resolve TQ2SA relay pinout; Stage 2 DAC + reconstruction filter
Relay residuals resolved from the Panasonic TQ-SMD connection diagram + contact-
resistance terminal pairs: coil=1/10, pole1 COM=3/NC=4/NO=2, pole2 COM=8/NC=7/NO=9,
pins 5/6 unused. (NC/NO sense also firmware-correctable via the GPIO drive.)
Stage 1b encoding already matched; docstring updated to "resolved".

Stage 2 (click source): PCM5102A DAC + 2nd-order Sallen-Key reconstruction filter.
- PCM5102A pinout verified (TI SLAS859C, TSSOP-20). 2.1Vrms GND-centered out (no
  DC-block), charge-pump flying cap + VNEG, DEMP/FLT/FMT tied for I2S/normal/no-deemph,
  SCK<-low-jitter MCLK, BCK/DIN/LRCK<-RP2350, XSMT pulled-up soft-mute.
- OPA1612 Sallen-Key LPF on OUTL. stage2_recon.cir confirms flat to 20kHz, -3dB at
  74.8 kHz -- cleans delta-sigma HF residue without touching audio.
- ERC 0 errors; netlist 0 errors.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-05-30 20:06:26 -05:00
..
.gitignore PM_K-1 hardware: Stage 1 input receiver as SKiDL (code-defined schematic) 2026-05-30 19:43:07 -05:00
pm_k1_core.kicad_pro PM_K-1 hardware: core-board design-of-record + KiCad scaffold 2026-05-30 11:42:45 -05:00
pm_k1_core.kicad_sch PM_K-1 hardware: core-board design-of-record + KiCad scaffold 2026-05-30 11:42:45 -05:00
skidl.erc PM_K-1 hardware: Stage 1 input receiver as SKiDL (code-defined schematic) 2026-05-30 19:43:07 -05:00
skidl.log PM_K-1 hardware: Stage 1 input receiver as SKiDL (code-defined schematic) 2026-05-30 19:43:07 -05:00
skidl_REPL.erc PM_K-1 hardware: Stage 1 audio (input receiver) sims + container libs 2026-05-30 19:27:25 -05:00
skidl_REPL.log PM_K-1 hardware: Stage 1 audio (input receiver) sims + container libs 2026-05-30 19:27:25 -05:00
stage1_input.erc PM_K-1 hardware: Stage 1 input receiver as SKiDL (code-defined schematic) 2026-05-30 19:43:07 -05:00
stage1_input.log PM_K-1 hardware: verify THAT1240 against datasheet; fix pinout + part numbers 2026-05-30 19:48:41 -05:00
stage1_input_sklib.py PM_K-1 hardware: verify THAT1240 against datasheet; fix pinout + part numbers 2026-05-30 19:48:41 -05:00
stage1b_select.erc PM_K-1 hardware: Stage 1b -- Hi-Z instrument DI buffer + line/inst select relay 2026-05-30 19:56:55 -05:00
stage1b_select.log PM_K-1 hardware: Stage 1b -- Hi-Z instrument DI buffer + line/inst select relay 2026-05-30 19:56:55 -05:00
stage1b_select_sklib.py PM_K-1 hardware: Stage 1b -- Hi-Z instrument DI buffer + line/inst select relay 2026-05-30 19:56:55 -05:00
stage2_dac.erc PM_K-1 hardware: resolve TQ2SA relay pinout; Stage 2 DAC + reconstruction filter 2026-05-30 20:06:26 -05:00
stage2_dac.log PM_K-1 hardware: resolve TQ2SA relay pinout; Stage 2 DAC + reconstruction filter 2026-05-30 20:06:26 -05:00
stage2_dac_sklib.py PM_K-1 hardware: resolve TQ2SA relay pinout; Stage 2 DAC + reconstruction filter 2026-05-30 20:06:26 -05:00