Host initdump proved mipidsi's MADCTL (0x48), COLMOD, and address window (CASET 0..319 / RASET 0..479) already match CircuitPython exactly — so the 1/4 + rotation wasn't an addressing bug. The missing piece was the ST7796 extension init (B6/power/gamma) running as the PRIMARY bring-up right after reset (grafting it onto mipidsi's already-DISPON'd panel blanked or under-configured it). Now: manual hw reset + full CircuitPython st7796_init via the raw interface, THEN Builder without reset_pin (re-asserts only the basics, extension setup persists). initdump extended to also dump CASET/RASET draw windows. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> |
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| .. | ||
| pm-kit | ||
| pm-ui | ||
| track-format | ||
| uisim | ||
| Containerfile | ||
| README.md | ||
| run.sh | ||
Rust port — track-format crate (Stage 1)
Pure parse/serialize codec for the track DSL, validated against the shared golden
vectors (tests/fixtures/track-format.json) — the third implementation alongside
engine.js and app.py. See docs/rust-port.md for the staged plan.
All tooling runs in a container (per the develop-in-container rule):
./rust/run.sh # cargo test — runs the conformance + idempotency suite
./rust/run.sh cargo build
./rust/run.sh bash # interactive shell in the crate