Inverting summing amp (OPA1612 section) mixes STAGE1_OUT (line/instrument) and
CLICK_OUT (filtered DAC) at unity into MIX_OUT. Each source enters its own 10k into
the op-amp virtual ground, so they sum with no interaction.
stage3_sum.cir confirms: each input alone = 0 dB, both together = +6.02 dB, and each
input's gain is unchanged by the other (virtual-ground isolation). ERC/netlist 0 errors.
Note: inverting summer flips phase -> corrected at the Stage 4 balanced driver via
hot/cold assignment. At integration, this summer can use the parked 2nd half of the
Stage 2 filter OPA1612 (U4) instead of a separate package.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
OPA1641 non-inverting DI buffer (1Mohm in, +12dB) + TQ2SA DPDT relay that both
routes the jack tip (line receiver vs DI buffer) and selects the output. Default
de-energized = LINE (common case, fail-safe). Driven by the shared ULN2003 via
net K1_DRV from GPIO SEL_LINST.
Pinouts verified from datasheets before capture (per the no-guessing rule):
- OPA1641 (TI SBOS484D): 1=NC 2=-IN 3=+IN 4=V- 5=NC 6=OUT 7=V+ 8=NC.
- ULN2003A: GND=8, COM=9, in 1-7 / out 16-10.
- TQ2SA (Panasonic TQ-SMD): pole1 COM=3 throws 2/4, pole2 COM=8 throws 7/9
(from contact-resistance terminal pairs). NC/NO orientation + coil pins (1/10)
follow the standard single-side-stable diagram -- flagged in-file for a final
connection-diagram cross-check (not over-claimed).
ngspice stage1b_di.cir confirms +12.04dB gain, flat across the audio band.
ERC 0 errors; netlist 0 errors.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Verified the receiver from THAT doc 600035 rev05 instead of guessing:
- THAT1240 = 0 dB (unity) -- correct as specced; 1243=-3dB, 1246=-6dB would be wrong.
- SO-8 pinout 1=Ref 2=In- 3=In+ 4=Vee 5=Sense 6=Vout 7=Vcc 8=NC. My initial
SKiDL pins were mostly wrong; corrected. Netlist now matches the datasheet.
- KiCad Device:D is pin1=K/pin2=A; my clamp diodes were reversed -- fixed so they
actually clamp (D high->cathode to +15, D low->anode to -15).
- BOM part numbers had a bogus "W16" suffix; corrected to S08-U (SO-8). Noted
INA134/SSM2141 as pin-compatible 2nd sources for long-term availability.
ERC 0 errors, netlist 0 errors.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Capture method = SKiDL per decision. circuits/stage1_input.py defines the
balanced line receiver + per-leg protection (DC-block film cap, series R, bias R,
clamp diodes to the rails) and emits a KiCad netlist. ERC: 0 errors (2 expected
warnings -- AIN_HOT/COLD reach only one pin until the interconnect block exists).
Container: env vars point SKiDL/KiCad at the symbol/footprint libs.
VERIFY-before-layout flagged in-file: exact THAT124x gain suffix, its SO-8 pin
numbers, clamp-diode orientation.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
