Capture method = SKiDL per decision. circuits/stage1_input.py defines the
balanced line receiver + per-leg protection (DC-block film cap, series R, bias R,
clamp diodes to the rails) and emits a KiCad netlist. ERC: 0 errors (2 expected
warnings -- AIN_HOT/COLD reach only one pin until the interconnect block exists).
Container: env vars point SKiDL/KiCad at the symbol/footprint libs.
VERIFY-before-layout flagged in-file: exact THAT124x gain suffix, its SO-8 pin
numbers, clamp-diode orientation.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
