From 9792729be0692ffd3108abc98194868282d12a35 Mon Sep 17 00:00:00 2001 From: Me Here Date: Sun, 31 May 2026 18:51:51 -0500 Subject: [PATCH] PM_K-1 hardware: note locally-saved EVM/reference layouts in LAYOUT_REFERENCES.md Downloaded the 3 priority reference layouts into hardware/datasheets/ (git-ignored): - TPS65131EVM_SLVUAW7.pdf (switcher EVM 4-layer plots + BOM) - TPS7A30-49EVM_SLVU405.pdf (+/-15V dual-LDO EVM, schematic+layout+BOM) - RP2350-Minimal-KiCAD.zip (official RP2350 KiCad: nested RP2350A/QFN-60 + RP2350B/QFN-80) Verified the switcher EVM contains the full Top/Inner1/Inner2/Bottom layer plots. Co-Authored-By: Claude Opus 4.8 (1M context) --- hardware/LAYOUT_REFERENCES.md | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hardware/LAYOUT_REFERENCES.md b/hardware/LAYOUT_REFERENCES.md index f8b6ba8..96d4f6c 100644 --- a/hardware/LAYOUT_REFERENCES.md +++ b/hardware/LAYOUT_REFERENCES.md @@ -100,3 +100,13 @@ principles. Two of these are essentially our exact circuit. Hand these (plus `LAYOUT.md`) to whoever routes the board; they cover every stage where layout — not schematic — determines whether it works. + +## Saved locally (in `hardware/datasheets/`, git-ignored) +The three priority references are downloaded for offline use: +- **`TPS65131EVM_SLVUAW7.pdf`** — switcher EVM, includes the full **4-layer PCB plots** + (Top / Inner 1 / Inner 2 / Bottom) + BOM (which matches our TPS65131RGER / 4.7 µH / MBRM120). + *Copy this layout for the switcher block.* +- **`TPS7A30-49EVM_SLVU405.pdf`** — the ±15 V dual-LDO EVM (schematic + layout + thermal + BOM). +- **`RP2350-Minimal-KiCAD.zip`** — official RP2350 reference. **Nested:** unzip it, then extract + `RP-006440-...RP2350A Minimal Board Kicad archive.zip` (RP2350A / QFN-60 = our part) for the + schematic + PCB + footprints; the `RP-006442` archive is the QFN-80 (RP2350B) variant.