PM_K-1 hardware: fix footprint names so board.net imports cleanly into KiCad

Audited every footprint in board.net against the KiCad 9 libraries: 6 were wrong names,
now corrected to the real library footprints:
- QFN-24 -> ..._EP2.65x2.65mm (TPS65131); QFN-60 -> ..._EP3.4x3.4mm (RP2350A)
- HVSSOP-8 -> ..._EP1.57x1.89mm (LDOs); SOIC-8 wide -> 5.3x5.3mm (W25Q128)
- Keystone 1066 -> 1060 holder; inductor -> L_1210_3225Metric placeholder (set per part)
Now 25/27 footprints resolve; only RV-8803-C7 and the TQ2SA relay need custom footprints
(KiCad has neither) -- import from SnapEDA/manufacturer at layout.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
This commit is contained in:
Me Here 2026-05-31 15:41:04 -05:00
parent 751c3f7803
commit 88af54e544

View file

@ -24,7 +24,7 @@ R = Part("Device","R", dest=TEMPLATE, footprint="Resistor_SMD:R_0402_1005Metric
def C(v, fp="Capacitor_SMD:C_0402_1005Metric"): return Part("Device","C", value=v, footprint=fp)
D = Part("Device","D", dest=TEMPLATE, footprint="Diode_SMD:D_SOD-323")
DS = Part("Device","D_Schottky", dest=TEMPLATE, footprint="Diode_SMD:D_SOD-323")
L = Part("Device","L", dest=TEMPLATE, footprint="Inductor_SMD:L_0806_2016Metric")
L = Part("Device","L", dest=TEMPLATE, footprint="Inductor_SMD:L_1210_3225Metric") # placeholder; set per actual inductor (Wuerth/EPCOS/Abracon) at layout
# ============================ shared nets ============================
vbus,p5,p18,n18,p15,n15,p3v3,dvdd,gnd = (Net("VBUS_5V"),Net("+5V"),Net("+18V"),Net("-18V"),
@ -68,11 +68,11 @@ TPS65131 = mk("TPS65131",[Pin(num=1,name="INP",func=P.PASSIVE),Pin(num=24,name="
Pin(num=13,name="OUTN",func=P.PASSIVE),Pin(num=14,name="OUTN2",func=P.PASSIVE),Pin(num=15,name="VNEG",func=P.INPUT),
Pin(num=16,name="FBN",func=P.INPUT),Pin(num=17,name="VREF",func=P.PWROUT),Pin(num=18,name="CN",func=P.PASSIVE),
Pin(num=19,name="AGND",func=P.PWRIN),Pin(num=21,name="CP",func=P.PASSIVE),Pin(num=22,name="FBP",func=P.INPUT),
Pin(num=23,name="VPOS",func=P.INPUT),Pin(num=25,name="EP",func=P.PWRIN)],fp="Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm")
Pin(num=23,name="VPOS",func=P.INPUT),Pin(num=25,name="EP",func=P.PWRIN)],fp="Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.65x2.65mm")
def ldo(name): return mk(name,[Pin(num=1,name="OUT",func=P.PWROUT),Pin(num=2,name="FB",func=P.INPUT),
Pin(num=3,name="NC",func=P.NOCONNECT),Pin(num=4,name="GND",func=P.PWRIN),Pin(num=5,name="EN",func=P.INPUT),
Pin(num=6,name="NR",func=P.PASSIVE),Pin(num=7,name="DNC",func=P.NOCONNECT),Pin(num=8,name="IN",func=P.PWRIN),
Pin(num=9,name="EP",func=P.PWRIN)],fp="Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm")
Pin(num=9,name="EP",func=P.PWRIN)],fp="Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm")
AP2112 = mk("AP2112K-3.3",[Pin(num=1,name="VIN",func=P.PWRIN),Pin(num=2,name="GND",func=P.PWRIN),
Pin(num=3,name="EN",func=P.INPUT),Pin(num=4,name="NC",func=P.NOCONNECT),Pin(num=5,name="VOUT",func=P.PWROUT)],
fp="Package_TO_SOT_SMD:SOT-23-5")
@ -108,7 +108,7 @@ reg3["VIN"]+=p5; reg3["EN"]+=p5; reg3["GND"]+=gnd; reg3["VOUT"]+=p3v3
ci3=C("1uF"); p5+=ci3[1]; ci3[2]+=gnd; co3=C("1uF"); p3v3+=co3[1]; co3[2]+=gnd
# ============================ RP2350 CORE ============================
rp = Part("MCU_RaspberryPi","RP2350A", footprint="Package_DFN_QFN:QFN-60-1EP_7x7mm_P0.4mm_EP3.6x3.6mm")
rp = Part("MCU_RaspberryPi","RP2350A", footprint="Package_DFN_QFN:QFN-60-1EP_7x7mm_P0.4mm_EP3.4x3.4mm")
for n in (1,11,20,30,38,45): rp[n]+=p3v3
for n in (6,23,39): rp[n]+=dvdd
rp[53]+=p3v3; rp[54]+=p3v3; rp[49]+=p3v3; rp[47]+=gnd; rp[61]+=gnd
@ -123,7 +123,7 @@ xt=Part("Device","Crystal",value="12MHz",footprint="Crystal:Crystal_SMD_3225-4Pi
xin+=xt[1]; xout+=xt[2]; cx1=C("15pF"); cx2=C("15pF"); xin+=cx1[1]; cx1[2]+=gnd; xout+=cx2[1]; cx2[2]+=gnd
FL=mk("W25Q128JVS",[Pin(num=1,name="CS",func=P.INPUT),Pin(num=2,name="IO1",func=P.BIDIR),Pin(num=3,name="IO2",func=P.BIDIR),
Pin(num=4,name="GND",func=P.PWRIN),Pin(num=5,name="IO0",func=P.BIDIR),Pin(num=6,name="CLK",func=P.INPUT),
Pin(num=7,name="IO3",func=P.BIDIR),Pin(num=8,name="VCC",func=P.PWRIN)],fp="Package_SO:SOIC-8_5.23x5.23mm_P1.27mm")
Pin(num=7,name="IO3",func=P.BIDIR),Pin(num=8,name="VCC",func=P.PWRIN)],fp="Package_SO:SOIC-8_5.3x5.3mm_P1.27mm")
fl=FL(); fl["CLK"]+=qsck; fl["IO0"]+=qd0; fl["IO1"]+=qd1; fl["IO2"]+=qd2; fl["IO3"]+=qd3; fl["CS"]+=qcs
fl["VCC"]+=p3v3; fl["GND"]+=gnd; dcp(p3v3)
rp[56]+=qsck; rp[57]+=qd0; rp[59]+=qd1; rp[58]+=qd2; rp[55]+=qd3; rp[60]+=qcs
@ -229,7 +229,7 @@ RV8803=mk("RV-8803-C7",[Pin(num=1,name="SDA",func=P.BIDIR),Pin(num=2,name="CLKOU
rtc=RV8803(); rtc["VDD"]+=vdd_rtc; rtc["VSS"]+=gnd; rtc["SDA"]+=i2c_sda; rtc["SCL"]+=i2c_scl
rtc["CLKOE"]+=gnd; rtc["EVI"]+=gnd; rtc["INT"]+=rtc_int
db1=DS(value="BAT54"); db2=DS(value="BAT54"); p3v3+=db1[2]; db1[1]+=vdd_rtc
bt=Part("Device","Battery_Cell",value="CR2032",footprint="Battery:BatteryHolder_Keystone_1066_1x2032")
bt=Part("Device","Battery_Cell",value="CR2032",footprint="Battery:BatteryHolder_Keystone_1060_1x2032")
bt["+"]+=db2[2]; db2[1]+=vdd_rtc; bt["-"]+=gnd; crt=C("100nF"); vdd_rtc+=crt[1]; crt[2]+=gnd
for net in (i2c_sda,i2c_scl):
rpu2=R(value="4.7k"); net+=rpu2[1]; rpu2[2]+=p3v3