PM_K-1 hardware: resolve TQ2SA relay pinout; Stage 2 DAC + reconstruction filter
Relay residuals resolved from the Panasonic TQ-SMD connection diagram + contact- resistance terminal pairs: coil=1/10, pole1 COM=3/NC=4/NO=2, pole2 COM=8/NC=7/NO=9, pins 5/6 unused. (NC/NO sense also firmware-correctable via the GPIO drive.) Stage 1b encoding already matched; docstring updated to "resolved". Stage 2 (click source): PCM5102A DAC + 2nd-order Sallen-Key reconstruction filter. - PCM5102A pinout verified (TI SLAS859C, TSSOP-20). 2.1Vrms GND-centered out (no DC-block), charge-pump flying cap + VNEG, DEMP/FLT/FMT tied for I2S/normal/no-deemph, SCK<-low-jitter MCLK, BCK/DIN/LRCK<-RP2350, XSMT pulled-up soft-mute. - OPA1612 Sallen-Key LPF on OUTL. stage2_recon.cir confirms flat to 20kHz, -3dB at 74.8 kHz -- cleans delta-sigma HF residue without touching audio. - ERC 0 errors; netlist 0 errors. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
This commit is contained in:
Me Here
parent
e6f425ee6f
commit
2f44be6f63
6 changed files with 282 additions and 4 deletions
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@ -17,10 +17,12 @@ PINOUTS VERIFIED FROM DATASHEETS
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* OPA1641 (TI SBOS484D): 1=NC 2=-IN 3=+IN 4=V- 5=NC 6=OUT 7=V+ 8=NC. Supply +/-18V max.
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* OPA1641 (TI SBOS484D): 1=NC 2=-IN 3=+IN 4=V- 5=NC 6=OUT 7=V+ 8=NC. Supply +/-18V max.
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* TQ2SA (Panasonic TQ-SMD): 2 Form C. pole1 COM=3 (throws 2,4); pole2 COM=8 (throws 7,9)
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* TQ2SA (Panasonic TQ-SMD): 2 Form C. pole1 COM=3 (throws 2,4); pole2 COM=8 (throws 7,9)
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-- confirmed from the contact-resistance terminal pairs (2-3,3-4,7-8,8-9).
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-- confirmed from the contact-resistance terminal pairs (2-3,3-4,7-8,8-9).
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CROSS-CHECK BEFORE LAYOUT (standard single-side-stable diagram, not over-claimed):
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RESOLVED from the Panasonic TQ-SMD connection diagram (single-side-stable, top view)
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* which throw is NC (closed when de-energized) -> we use 4 & 7 for LINE; swap if the
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+ the contact-resistance terminal pairs (2-3,3-4,7-8,8-9):
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exact connection diagram differs (so LINE stays the default).
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* coil = pins 1 & 10 (polarity irrelevant -- non-latching single coil, no diode).
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* coil terminal pair (using 1 & 10); coil polarity irrelevant (no internal diode).
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* pole1 COM=3, NC=4, NO=2 ; pole2 COM=8, NC=7, NO=9 ; pins 5,6 unused.
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NC/NO sense is also firmware-correctable: the relay is GPIO-driven, so if a physical
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unit reads opposite, invert SEL_LINST in firmware (no board change).
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Relay coil is driven by the SHARED ULN2003 (U14) -- represented here as net K1_DRV
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Relay coil is driven by the SHARED ULN2003 (U14) -- represented here as net K1_DRV
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(sinks the coil) + SEL_LINST (the RP2350 GPIO). The ULN2003 is instantiated once in
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(sinks the coil) + SEL_LINST (the RP2350 GPIO). The ULN2003 is instantiated once in
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the power/control block, not per-relay.
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the power/control block, not per-relay.
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137
hardware/eda/circuits/stage2_dac.py
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137
hardware/eda/circuits/stage2_dac.py
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@ -0,0 +1,137 @@
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#!/usr/bin/env python3
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"""PM_K-1 audio chain - Stage 2: PCM5102A DAC + reconstruction filter (SKiDL).
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Run INSIDE the EDA container:
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cd hardware/eda && ./run.sh python3 ../eda/circuits/stage2_dac.py
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Outputs ERC + a KiCad netlist at hardware/kicad/stage2_dac.net.
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WHAT THIS STAGE DOES
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The RP2350 streams I2S audio (the click, and later sampled sounds) to a PCM5102A
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DAC clocked by the dedicated low-jitter oscillator (SCK=MCLK). The PCM5102A puts
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out 2.1 Vrms GROUND-CENTERED analog (no DC-block cap needed). A 2nd-order
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Sallen-Key low-pass (~75 kHz, one OPA1612 section) removes the delta-sigma HF
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residue before the click reaches the summing/output stages -> CLICK_OUT.
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PINOUTS VERIFIED FROM DATASHEETS
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* PCM5102A (TI SLAS859C, PW/TSSOP-20): pin map below matches the datasheet table.
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Output 2.1Vrms GND-centered; 3.3V supplies; charge pump (CAPP/CAPM flying cap +
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VNEG) makes the negative rail for the ground-centered swing.
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* OPA1612 (dual): standard JEDEC dual-opamp SOIC-8 pinout
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(1=OUTA 2=-INA 3=+INA 4=V- 5=+INB 6=-INB 7=OUTB 8=V+), confirmed against the
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OPA164x dual on its datasheet (identical layout). Confirm OPA1612 sheet at layout.
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"""
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import os
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from skidl import *
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set_default_tool(KICAD9)
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R = Part("Device", "R", dest=TEMPLATE, footprint="Resistor_SMD:R_0805_2012Metric")
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C = Part("Device", "C", dest=TEMPLATE, footprint="Capacitor_SMD:C_0805_2012Metric")
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# ---- rails / signals ----
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p3v3, gnd, p15, n15 = Net("+3V3"), Net("GND"), Net("+15V"), Net("-15V")
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for n in (p3v3, gnd, p15, n15):
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n.drive = POWER
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mclk = Net("MCLK") # low-jitter audio clock -> SCK
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i2s_bck, i2s_din, i2s_lrck = Net("I2S_BCK"), Net("I2S_DIN"), Net("I2S_LRCK") # from RP2350
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dac_xsmt = Net("DAC_XSMT") # GPIO soft-mute (high=unmute), pulled up
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click_out = Net("CLICK_OUT")# filtered click -> Stage 3 summing
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# ---- PCM5102A (pinout verified, TI SLAS859C) ----
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DAC = Part(name="PCM5102A", tool=SKIDL, dest=TEMPLATE, ref_prefix="U",
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footprint="Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm",
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pins=[
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Pin(num=1, name="CPVDD", func=Pin.types.PWRIN),
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Pin(num=2, name="CAPP", func=Pin.types.PASSIVE),
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Pin(num=3, name="CPGND", func=Pin.types.PWRIN),
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Pin(num=4, name="CAPM", func=Pin.types.PASSIVE),
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Pin(num=5, name="VNEG", func=Pin.types.PASSIVE),
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Pin(num=6, name="OUTL", func=Pin.types.OUTPUT),
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Pin(num=7, name="OUTR", func=Pin.types.OUTPUT),
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Pin(num=8, name="AVDD", func=Pin.types.PWRIN),
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Pin(num=9, name="AGND", func=Pin.types.PWRIN),
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Pin(num=10, name="DEMP", func=Pin.types.INPUT),
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Pin(num=11, name="FLT", func=Pin.types.INPUT),
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Pin(num=12, name="SCK", func=Pin.types.INPUT),
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Pin(num=13, name="BCK", func=Pin.types.INPUT),
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Pin(num=14, name="DIN", func=Pin.types.INPUT),
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Pin(num=15, name="LRCK", func=Pin.types.INPUT),
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Pin(num=16, name="FMT", func=Pin.types.INPUT),
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Pin(num=17, name="XSMT", func=Pin.types.INPUT),
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Pin(num=18, name="LDOO", func=Pin.types.PWROUT),
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Pin(num=19, name="DGND", func=Pin.types.PWRIN),
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Pin(num=20, name="DVDD", func=Pin.types.PWRIN),
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])
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dac = DAC(ref="U3")
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# ---- OPA1612 dual op-amp (standard dual pinout) ----
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OPA2 = Part(name="OPA1612", tool=SKIDL, dest=TEMPLATE, ref_prefix="U",
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footprint="Package_SO:SOIC-8_3.9x4.9mm_P1.27mm",
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pins=[
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Pin(num=1, name="OUTA", func=Pin.types.OUTPUT),
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Pin(num=2, name="-INA", func=Pin.types.INPUT),
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Pin(num=3, name="+INA", func=Pin.types.INPUT),
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Pin(num=4, name="V-", func=Pin.types.PWRIN),
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Pin(num=5, name="+INB", func=Pin.types.INPUT),
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Pin(num=6, name="-INB", func=Pin.types.INPUT),
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Pin(num=7, name="OUTB", func=Pin.types.OUTPUT),
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Pin(num=8, name="V+", func=Pin.types.PWRIN),
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])
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flt = OPA2(ref="U4")
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# ---- PCM5102A supplies + grounds (all grounds tied; <0.2V per datasheet) ----
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dac["AVDD"] += p3v3
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dac["CPVDD"] += p3v3
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dac["DVDD"] += p3v3
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dac["AGND"] += gnd
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dac["DGND"] += gnd
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dac["CPGND"] += gnd
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for pin in ("AVDD", "CPVDD", "DVDD"):
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c = C(value="100nF"); dac[pin] += c[1]; c[2] += gnd
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cbulk = C(value="10uF", footprint="Capacitor_SMD:C_1206_3216Metric")
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dac["AVDD"] += cbulk[1]; cbulk[2] += gnd
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# charge pump: flying cap across CAPP/CAPM, VNEG + LDOO decoupling
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cfly = C(value="2.2uF", footprint="Capacitor_SMD:C_0805_2012Metric")
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dac["CAPP"] += cfly[1]; dac["CAPM"] += cfly[2]
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cvneg = C(value="2.2uF"); dac["VNEG"] += cvneg[1]; cvneg[2] += gnd
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cldoo = C(value="1uF"); dac["LDOO"] += cldoo[1]; cldoo[2] += gnd
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# control-pin tie-offs: no de-emphasis, normal latency, I2S format
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dac["DEMP"] += gnd
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dac["FLT"] += gnd
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dac["FMT"] += gnd
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# soft-mute: GPIO with 10k pull-up to keep un-muted by default
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dac["XSMT"] += dac_xsmt
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rpull = R(value="10k"); dac_xsmt += rpull[1]; rpull[2] += p3v3
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# clocks + data
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dac["SCK"] += mclk
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dac["BCK"] += i2s_bck
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dac["DIN"] += i2s_din
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dac["LRCK"] += i2s_lrck
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# OUTR unused (mono click on L): give it the datasheet-recommended load
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rload = R(value="2.2k"); dac["OUTR"] += rload[1]; rload[2] += gnd
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# ---- Sallen-Key reconstruction LPF on OUTL (R=1.5k, Ca=2.2n, Cb=1n ~75kHz) ----
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r1, r2 = R(value="1.5k"), R(value="1.5k")
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ca = C(value="2.2nF"); cb = C(value="1nF")
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nodeA = Net("RC_A")
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dac["OUTL"] += r1[1]; r1[2] += nodeA
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r2[1] += nodeA; r2[2] += flt["+INA"]
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ca[1] += nodeA; ca[2] += flt["OUTA"] # feedback cap
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cb[1] += flt["+INA"]; cb[2] += gnd
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flt["-INA"] += flt["OUTA"] # unity-gain follower
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flt["OUTA"] += click_out
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# ---- OPA1612 supplies + decoupling; park unused section B ----
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flt["V+"] += p15; flt["V-"] += n15
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for rail in (p15, n15):
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c = C(value="100nF"); rail += c[1]; c[2] += gnd
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flt["+INB"] += gnd; flt["OUTB"] += flt["-INB"] # B = grounded follower (parked)
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ERC()
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out = os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "..", "kicad", "stage2_dac.net"))
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generate_netlist(file_=out)
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print("Stage 2 netlist ->", out)
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35
hardware/eda/sim/stage2_recon.cir
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hardware/eda/sim/stage2_recon.cir
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@ -0,0 +1,35 @@
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* PM_K-1 Stage 2 : DAC reconstruction filter (2nd-order Sallen-Key low-pass)
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*
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* The PCM5102A is a delta-sigma DAC: its analog output carries the audio plus
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* shaped high-frequency quantization noise WAY above the audio band. A gentle
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* low-pass cleans that residue before it reaches the pro output stage. We want it
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* dead flat to 20 kHz and rolling off above ~80 kHz (Butterworth, Q~0.7).
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*
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* Unity-gain Sallen-Key, equal R. Target fc ~75 kHz with R=1.5k, C1=2.2n, C2=1n.
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* Run: ngspice -b ../eda/sim/stage2_recon.cir
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.title Stage2 DAC reconstruction filter
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.param R=1.5k
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.param Ca=2.2n
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.param Cb=1n
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Vin in 0 AC 1
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R1 in a {R}
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R2 a vp {R}
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Ca a out {Ca} ; feedback cap
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Cb vp 0 {Cb} ; cap to ground
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Eop out 0 vp out 1e6 ; unity-gain follower op-amp (-in tied to out)
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.ac dec 100 100 2meg
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.control
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run
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meas ac g_1k find vdb(out) at=1k
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meas ac g_20k find vdb(out) at=20k
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meas ac f_3db when vdb(out)=-3
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echo
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echo " passband @1kHz : $&g_1k dB"
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echo " @20kHz (audio edge) : $&g_20k dB (want ~0 dB = flat)"
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echo " -3dB corner : $&f_3db Hz (well above audio; attenuates DAC HF residue)"
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.endc
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.end
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15
hardware/kicad/stage2_dac.erc
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hardware/kicad/stage2_dac.erc
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ERC WARNING: Only one pin (INPUT pin 15/LRCK of PCM5102A/U3) attached to net I2S_LRCK.
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ERC WARNING: No drivers for net I2S_LRCK.
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ERC WARNING: Insufficient drive current on net I2S_LRCK for pin INPUT pin 15/LRCK of PCM5102A/U3.
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ERC WARNING: Only one pin (INPUT pin 13/BCK of PCM5102A/U3) attached to net I2S_BCK.
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ERC WARNING: No drivers for net I2S_BCK.
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ERC WARNING: Insufficient drive current on net I2S_BCK for pin INPUT pin 13/BCK of PCM5102A/U3.
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ERC WARNING: Only one pin (INPUT pin 12/SCK of PCM5102A/U3) attached to net MCLK.
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ERC WARNING: No drivers for net MCLK.
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ERC WARNING: Insufficient drive current on net MCLK for pin INPUT pin 12/SCK of PCM5102A/U3.
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ERC WARNING: Only one pin (INPUT pin 14/DIN of PCM5102A/U3) attached to net I2S_DIN.
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ERC WARNING: No drivers for net I2S_DIN.
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ERC WARNING: Insufficient drive current on net I2S_DIN for pin INPUT pin 14/DIN of PCM5102A/U3.
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ERC INFO: 12 warnings found while running ERC.
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ERC INFO: 0 errors found while running ERC.
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45
hardware/kicad/stage2_dac.log
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hardware/kicad/stage2_dac.log
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WARNING: KICAD8_SYMBOL_DIR environment variable is missing, so the default KiCad symbol libraries won't be searched. @ [/work/hardware/kicad/<frozen importlib._bootstrap_external>:995=>/work/hardware/kicad/<frozen importlib._bootstrap>:488]
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WARNING: KICAD6_SYMBOL_DIR environment variable is missing, so the default KiCad symbol libraries won't be searched. @ [/work/hardware/kicad/<frozen importlib._bootstrap_external>:995=>/work/hardware/kicad/<frozen importlib._bootstrap>:488]
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WARNING: KICAD7_SYMBOL_DIR environment variable is missing, so the default KiCad symbol libraries won't be searched. @ [/work/hardware/kicad/<frozen importlib._bootstrap_external>:995=>/work/hardware/kicad/<frozen importlib._bootstrap>:488]
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WARNING: fp-lib-table file was not found. Component footprints are not available.
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WARNING: fp-lib-table file was not found. Component footprints are not available.
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WARNING: fp-lib-table file was not found. Component footprints are not available.
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WARNING: fp-lib-table file was not found. Component footprints are not available.
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WARNING: Missing tag on PCM5102A instantiated at /work/hardware/eda/circuits/stage2_dac.py:65.
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WARNING: Random tag SnNljvRqpw generated for PCM5102A.
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WARNING: Missing tag on OPA1612 instantiated at /work/hardware/eda/circuits/stage2_dac.py:80.
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WARNING: Random tag xlt7MeMuUW generated for OPA1612.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:90.
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WARNING: Random tag APxc1ZswyC generated for C.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:90.
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WARNING: Random tag 2Lpho8vvNO generated for C.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:90.
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WARNING: Random tag ckOnqrtEN_ generated for C.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:91.
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WARNING: Random tag u0XfWM3NJZ generated for C.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:95.
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WARNING: Random tag 0nDWAElKnx generated for C.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:97.
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WARNING: Random tag enBI6FilVb generated for C.
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WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:98.
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WARNING: Random tag BsHVUTUgsl generated for C.
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WARNING: Missing tag on R instantiated at /work/hardware/eda/circuits/stage2_dac.py:106.
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WARNING: Random tag MwfOtBOy0H generated for R.
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WARNING: Missing tag on R instantiated at /work/hardware/eda/circuits/stage2_dac.py:115.
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WARNING: Random tag T191zb3J0X generated for R.
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WARNING: Missing tag on R instantiated at /work/hardware/eda/circuits/stage2_dac.py:118.
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WARNING: Random tag PbFpsp3Kl4 generated for R.
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WARNING: Missing tag on R instantiated at /work/hardware/eda/circuits/stage2_dac.py:118.
|
||||||
|
WARNING: Random tag uQ27wvkIQL generated for R.
|
||||||
|
WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:119.
|
||||||
|
WARNING: Random tag xSn6HarfSW generated for C.
|
||||||
|
WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:119.
|
||||||
|
WARNING: Random tag mU_gTQB1ji generated for C.
|
||||||
|
WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:131.
|
||||||
|
WARNING: Random tag u20v3iP1Ti generated for C.
|
||||||
|
WARNING: Missing tag on C instantiated at /work/hardware/eda/circuits/stage2_dac.py:131.
|
||||||
|
WARNING: Random tag ZBz2Y2o1hX generated for C.
|
||||||
|
WARNING: Missing tag on instantiated at /work/hardware/kicad/<frozen importlib._bootstrap>:488.
|
||||||
|
INFO: 39 warnings found while generating netlist.
|
||||||
|
INFO: 0 errors found while generating netlist.
|
||||||
|
|
||||||
44
hardware/kicad/stage2_dac_sklib.py
Normal file
44
hardware/kicad/stage2_dac_sklib.py
Normal file
|
|
@ -0,0 +1,44 @@
|
||||||
|
from collections import defaultdict
|
||||||
|
from skidl import Pin, Part, Alias, SchLib, SKIDL, TEMPLATE
|
||||||
|
|
||||||
|
from skidl.pin import pin_types
|
||||||
|
|
||||||
|
SKIDL_lib_version = '0.0.1'
|
||||||
|
|
||||||
|
stage2_dac = SchLib(tool=SKIDL).add_parts(*[
|
||||||
|
Part(**{ 'name':'PCM5102A', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'PCM5102A'}), 'ref_prefix':'U', 'fplist':None, 'footprint':'Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm', 'keywords':None, 'description':'', 'datasheet':None, 'pins':[
|
||||||
|
Pin(num='1',name='CPVDD',func=pin_types.PWRIN),
|
||||||
|
Pin(num='2',name='CAPP',func=pin_types.PASSIVE),
|
||||||
|
Pin(num='3',name='CPGND',func=pin_types.PWRIN),
|
||||||
|
Pin(num='4',name='CAPM',func=pin_types.PASSIVE),
|
||||||
|
Pin(num='5',name='VNEG',func=pin_types.PASSIVE),
|
||||||
|
Pin(num='6',name='OUTL',func=pin_types.OUTPUT),
|
||||||
|
Pin(num='7',name='OUTR',func=pin_types.OUTPUT),
|
||||||
|
Pin(num='8',name='AVDD',func=pin_types.PWRIN),
|
||||||
|
Pin(num='9',name='AGND',func=pin_types.PWRIN),
|
||||||
|
Pin(num='10',name='DEMP',func=pin_types.INPUT),
|
||||||
|
Pin(num='11',name='FLT',func=pin_types.INPUT),
|
||||||
|
Pin(num='12',name='SCK',func=pin_types.INPUT),
|
||||||
|
Pin(num='13',name='BCK',func=pin_types.INPUT),
|
||||||
|
Pin(num='14',name='DIN',func=pin_types.INPUT),
|
||||||
|
Pin(num='15',name='LRCK',func=pin_types.INPUT),
|
||||||
|
Pin(num='16',name='FMT',func=pin_types.INPUT),
|
||||||
|
Pin(num='17',name='XSMT',func=pin_types.INPUT),
|
||||||
|
Pin(num='18',name='LDOO',func=pin_types.PWROUT),
|
||||||
|
Pin(num='19',name='DGND',func=pin_types.PWRIN),
|
||||||
|
Pin(num='20',name='DVDD',func=pin_types.PWRIN)] }),
|
||||||
|
Part(**{ 'name':'OPA1612', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'OPA1612'}), 'ref_prefix':'U', 'fplist':None, 'footprint':'Package_SO:SOIC-8_3.9x4.9mm_P1.27mm', 'keywords':None, 'description':'', 'datasheet':None, 'pins':[
|
||||||
|
Pin(num='1',name='OUTA',func=pin_types.OUTPUT),
|
||||||
|
Pin(num='2',name='-INA',func=pin_types.INPUT),
|
||||||
|
Pin(num='3',name='+INA',func=pin_types.INPUT),
|
||||||
|
Pin(num='4',name='V-',func=pin_types.PWRIN),
|
||||||
|
Pin(num='5',name='+INB',func=pin_types.INPUT),
|
||||||
|
Pin(num='6',name='-INB',func=pin_types.INPUT),
|
||||||
|
Pin(num='7',name='OUTB',func=pin_types.OUTPUT),
|
||||||
|
Pin(num='8',name='V+',func=pin_types.PWRIN)] }),
|
||||||
|
Part(**{ 'name':'C', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'C'}), 'ref_prefix':'C', 'fplist':[''], 'footprint':'Capacitor_SMD:C_0805_2012Metric', 'keywords':'cap capacitor', 'description':'Unpolarized capacitor', 'datasheet':'~', 'pins':[
|
||||||
|
Pin(num='1',name='~',func=pin_types.PASSIVE,unit=1),
|
||||||
|
Pin(num='2',name='~',func=pin_types.PASSIVE,unit=1)], 'unit_defs':[] }),
|
||||||
|
Part(**{ 'name':'R', 'dest':TEMPLATE, 'tool':SKIDL, 'aliases':Alias({'R'}), 'ref_prefix':'R', 'fplist':[''], 'footprint':'Resistor_SMD:R_0805_2012Metric', 'keywords':'R res resistor', 'description':'Resistor', 'datasheet':'~', 'pins':[
|
||||||
|
Pin(num='1',name='~',func=pin_types.PASSIVE,unit=1),
|
||||||
|
Pin(num='2',name='~',func=pin_types.PASSIVE,unit=1)], 'unit_defs':[] })])
|
||||||
Loading…
Reference in a new issue